? semiconductor components industries, llc, 2011 april, 2011 ? rev. 3 1 publication order number: CM3106/d CM3106 2 amp source/ sink bus termination regulator product description the CM3106 is a sinking and sourcing regulator specifically designed for providing power to ddr memory terminating resistors and companion chip set v tt power. the output voltage accurately tracks v ddq /2. the CM3106 can source and sink current up to 2 a, ideal for ddr ? i memory systems, and 1.2 a for ddr ? ii systems, while maintaining a load regulation of 0.5% in either application. the CM3106 provides over current and over temperature protection which protects the device from excessive heating due to high current and high temperature. a shutdown capability using an external transistor reduces power consumption and provides a high impedance output. the CM3106 is housed in an 8 ? lead soic rohs ? compliant package. features ? ideal for ddr ? i and ddr ? ii v tt applications ? sinks and sources 2.0a for ddr ? i ? over current protection ? over temperature protection ? integrated power mosfets ? excellent accuracy (0.5% load regulation) ? pin and functionally compatible with lp2995 ? 8 ? lead soic package ? these devices are pb ? free and are rohs compliant applications ? single and dual channel ddr memory bus termination ? active termination buses ? graphics card memory termination marking diagram device package shipping ? ordering information http://onsemi.com CM3106 ? 12sm soic ? 8 (pb ? free) 2500/tape & reel soic ? 8 sm suffix case 751 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. 1 8 xxxxxx ayww 1 8 xxxxxx = CM3106 ? 12sm a = assembly location y = year ww = work week = pb ? free package
CM3106 http://onsemi.com 2 simplified electrical schematic av in v ddq pv in v ref gnd v tt v sense driver buffer out in 50 k 50 k over temp over current reference table 1. pin descriptions lead(s) name description 1 nc no connect 2 gnd ground 3 v sense feedback 4 v ref reference output, vddq/2 5 v ddq v ddq input 6 av in analog input 7 pv in power input 8 v tt output package / pinout diagram top view 8 ? lead soic nc 1 2 3 45 6 7 8 gnd v sense v ref pv in av in v tt v ddq specifications table 2. absolute maximum ratings parameter rating units av in operating supply voltage 7 v v ddq input voltage 7 v pin voltages v tt output any other pins 7 7 v esd (hbm) 2000 v storage temperature range ? 40 to +150 c operating temperature range ambient junction ? 40 to +85 (note 1) ? 40 to +150 c power dissipation (note 1) internally limited w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. these devices must be derated based on thermal resistance at elevated temperatures. the device packaged in an 8 ? lead soic leadframe must be derated at ja = 151 c/w. ja of the 8 ? lead psop is 40 c/w.
CM3106 http://onsemi.com 3 table 3. standard operating conditions parameter rating units v ddq 2.5 v av in 2.5 v pv in 2.5 v ambient operating temperature 0 to +70 c c tt 220 20% f table 4. electrical operating characteristics (note 1) symbol parameter conditions min typ max units v in input voltage range v ddq av in 2.2 2.2 2.5 2.5 av in 5.5 v i cc av in quiescent current i vtt = 0 a 450 a v rload load regulation 0 a i vtt 2.0 a or ? 2.0 a i vtt 0 a 6.25 mv v ref output reference voltage v ddq = 2.5 v, i ref = 0 a 1.225 1.25 1.275 v vos vtt output offset from v ref ? 20 20 mv z ref v ref output impedance ? 5 a i ref 5 a 5 k z vddq v ddq input impedance 100 k i lim v tt current limit 2.5 a t disable t hyst shutdown temperature thermal hysteresis 150 50 c c 1. operating characteristics are over standard operating conditions unless otherwise specified. performance information typical dc characteristics (nominal conditions unless otherwise specified) figure 1. output voltage with av in supply (v ddq = 2.5 v) figure 2. load regulation (sink)
CM3106 http://onsemi.com 4 performance information (cont?d) typical dc characteristics (nominal conditions unless otherwise specified) figure 3. reference voltage with av in supply (v ddq = 2.5 v) figure 4. load regulation (source) figure 5. over current limit (sink) figure 6. av in supply current with supply voltage
CM3106 http://onsemi.com 5 performance information (cont?d) typical dc characteristics (nominal conditions unless otherwise specified) figure 7. over current limit (source) figure 8. load transient (0 a to 2.0 a sink) figure 9. line transient (0 a to 2.0 a sink)
CM3106 http://onsemi.com 6 performance information (cont?d) typical thermal characteristics (nominal conditions unless otherwise specified) the overall junction to ambient thermal resistance ( ja ) for device power dissipation (p d ) consists primarily of two paths in series. the first path is the junction to the case ( jc ) which is defined by the package style, and the second path is case to ambient ( ca ) thermal resistance which is dependent on board layout. the final operating junction temperature for any set of conditions can be estimated by the following thermal equation: t junc = t amb + p d ( jc ) + p d ( ca ) = t amb + p d ( ja ) when a CM3106 ? 12sm is mounted on a double sided printed circuit board with two square inches of copper allocated for ?heat spreading?, the resulting ja is 151 c/w. based on the over temperature limit of 150 c with an ambient of 70 c, the available power of this package will be: p d = (150 c ? 85 c) / 151 c/w = 0.43 w since the ja of the CM3106 ? 12sb (psop) is 40 c/w, the available power for this package will be: p d = (150 c ? 85 c) / 40 c/w = 1.625 w ddr memory application since the output voltage is 1.25 v, and the device can either source current from v dd or sink current to ground, the power dissipated in the device at any time is 1.25 v times the current load. this means the the maximum average rms current (in either direction) is 0.344 a for the CM3106 ? 12sm and 1.3 a for the CM3106 ? 12sb. the maximum instantaneous current is specified at 2 a, so this condition should not be exceeded for more than 17% of the time for the CM3106 ? 12sm and 65% of the time for the CM3106 ? 12sb. it is highly unlikely in most usage of ddr memory that this might occur, because it means the ddr memory outputs are either all high or all low for 17% (soic) and 65% (psop) of the time. if the ambient temperature is 40 c instead of 85 c, which is typically the maximum in most ddr memory applications, the power dissipated (p d ) can be 0.73 w, for the CM3106 ? 12sm and 2.75 w for the CM3106 ? 12sb. so the maximum average rms current increases from 0.42 a to 0.58 a for the CM3106 ? 12sm and a maximum instantaneous current of 2 a should not be exceeded for more than 29% of the time. for CM3106 ? 12sb, the maximum rms current increases from 1.3 a to 2.2 a. thus, the maximum continuous current can be 2 a all the time. figure 10. duty cycle vs. ambient temperature (i load = 2.0 a) figure 11. duty cycle vs. output current (temp = 70 c)
CM3106 http://onsemi.com 7 performance information (cont?d) typical thermal characteristics (cont?d) (nominal conditions unless otherwise specified) the theoretical calculations of these relationships show the safe operating area of the CM3106 in the soic package. thermal characteristics were measured using a double sided board with two square inches of copper area connected to the gnd pins for ?heat spreading?. measurements showing performance up to a junction temperature of 150 c were performed under light load conditions (5 ma). this allows the ambient temperature to be representative of the internal junction temperature. note: the use of multi ? layer board construction with separate ground and power planes will further enhance the overall thermal performance. figure 12. reference voltage vs. temperature figure 13. v tt output voltage vs. temperature (5 ma load) figure 14. av in quiescent current vs. temperature
CM3106 http://onsemi.com 8 application information figure 15. typical application circuit v ddq av in pv in c avin 47 f c pvin 47 f v ddq av in pv in v ref v sense v tt v ref v tt c ref 0.1 f c tt 220 f gnd CM3106 pcb layout considerations the CM3106 ? 12sb has a heat spreader attached to the underneath of the psop ? 8 package in order for heat to be transferred much easier from the package to the pcb. the heat spreader is a copper pad of dimensions just smaller than the package itself. by positioning the matching pad on the pcb top layer to connect to the spreader during manufacturing, the heat will be transferred between the two pads. the drawing below shows the recommended pcb layout. note that there are six vias on either side to allow the heat to dissipate into the ground and power planes on the inner layers of the pcb. vias can be placed underneath the chip, but this can cause blockage of the solder. the ground and power planes should be at least 2 sq in. of copper by the vias. it also helps dissipation to spread if the chip is positioned away from the edge of the pcb, and not near other heat dissipating devices. a good thermal link from the pcb pad to the rest of the pcb will ensure a thermal link from the CM3106 package to ambient, ja , of around 40 c/w. figure 16. recommended heat sink pcb layout
CM3106 http://onsemi.com 9 package dimensions soic ? 8 nb case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 CM3106/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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